1
2
3
4
5
6
7
8
9
10
11
Part 1, asynchronous counter is changing state bits are used as clocks to subsequent state flip-flops. J and K is normally logic ‘1’ that means the next state of output Q is depends on Q ̅. This is the toggle mode.. As this circuit, it is the negative edge triggered clocking. When every clock is changed from high to low, the output will be toggled (increased 1). On the other hand, the switch B is the clear bottom, B is given a logic low will operate as clear mode (all output Q reset to logic 0).

As the result, it is the ripple counter, which it is counting up counter and can count to 2n − 1 where n is the number of bits (flip-flop stages) in the counter.. Increasing 1 each clocked. Ripple counters suffer from unstable outputs as the overflows "ripple" from stage to stage. Also, Each flip flop clocked depends on pervious output so the waveforms show that frequencies divide by 2 of previous output.

Part2, synchronous counter means all state bits change under control of a single clock. Each bit to toggle when all of the less significant bits are at a logic high state. For example, bit 1 toggles when bit 0 is logic high; bit 2 toggles when both bit 1 and bit 0 are logic high; bit 3 toggles when bit 2, bit 1 and bit 0 are all high; and so on. A synchronous counter, in contrast to an asynchronous counter, is one whose output bits change state simultaneously, with no ripple. The output is same.

Part3, it is 4-bit up/down Counter. Also, it can present value as the start point. Hence, this circuit is without the input. It is convenient. Also, we can see the carry bit and the borrow bit. When 1111 count up to 0000, the carry bit will change to low. There is the fifth bit. We can ignore because it is 4 bit counter. Likewise, when 0000 count down to 1111, the borrow bit will change low, it is because 0000 is less than 1111, it need one more bit to complete the subtraction so it need borrow a bit.

The circuit shows that the normally 4 bits addition and subtraction in binary. Also, we can see the waveforms, the frequencies is divided by 2 each bit from less significant bit to most significant bit.

Part4, we know it is the decade counter, is one that counts in decimal digits, rather than binary. The decade counter is also known as a mod-counter when it counts to ten (0, 1, 2, 3, 4, 5, 6, 7, 8, 9) .A Mod Counter that counts to 10 stops at 9 because 0 counts as a valid digit.